Distributed Computing Laboratory DCL


ccbench is a tool for measuring the cache-coherence latencies of a processor, i.e., the latencies of loads, stores, compare-and-swap (CAS), fetch-and-increment (FAI), test-and-set (TAS), and swap (SWAP). The latencies that ccbench measures can be used to understand and predict the behavior of sharing and synchronization on the underlying hardware platform.

ccbench is a part of the SSYNC synchronization suite.


ccbench brings a single cache line L in the desired MESI state and position in the processor and then performs that target operation on L. In more details, ccbench takes the following steps:

1. It uses one (or more) cores to bring L in the desired state and position, e.g., in a Modified state in the local caches of core 0 in node 0.
2. It then uses another core in order to perform the target operation, e.g., load from a modified state that is on the local caches of a core that is on the same node.


You can get a copy of the source code of ccbech at: https://github.com/trigonak/ccbench